This invention relates generally to floating point processors and more particularly to data path alignment in floating point processors.
As is known in the art, many applications in computers require the use of numbers that are not integers. There are several ways in which nonintegers can be represented in computers. The most common approach is the so-called floating point number in which a number is divided into separate sections or registers. One section being a fraction which represents the precision of the number, and the other section of the register being an exponent which represents in base two, the power to which the fraction is raised. A third section has a sign bit for the operand or number.
In addition to performing floating point calculations such as addition, subtraction, multiplication and division, often floating point processors include logic to convert numbers between floating point and integer formats or representations. A typical floating point processor would include in addition to the logic to perform the floating point calculations and conversions a register file to store operands which are used in the calculations or conversions. These operands or numbers can be stored in either integer or floating point format.
One problem encountered in floating point processors which also do conversions is data path alignment. Because the same data path is used to convert between representations and execute floating point operations there exists an incompatibility in using and storing the two different formats. That is a floating point number with its fraction and exponent is coupled between the register file and the data path of the processor in one manner whereas, an integer representation of illustratively 64 bits is coupled between the register file and the data path in a substantially different manner.
To solve this problem the MSB of the floating point fraction is generally aligned with the MSB of the fraction data path and the MSB of the integer is also aligned with the MSB of the fraction data path. Sets of multiplexers for both reading and writing to the register file are disposed in the data path to permit the data to be formatted into floating point or integer in accordance with an instruction executed in the floating point processor.
One problem with this approach is that the multiplexers which are relatively slow are disposed in a critical delay path in the processor. In most floating point operations the most time critical path is the floating point fraction path. By being in the fraction portion of the data path the multiplexers adversely affect the critical path delay of all floating point operations. In addition, these multiplexers also occupy a significant amount of chip area in a floating point processor.